Duncan C Dobson

US Patent:

20010023082, Sep 20, 2001

Filed:

Mar 15, 2001

Appl. No.:

09/808736

Inventors:

Krishna Vepa - Livermore CA, US
Duncan Dobson - Woodside CA, US

International Classification:

H01L021/66

US Classification:

438/014000

Abstract:

The present invention provides systems and methods for grinding wafers for use in manufacturing semiconductor devices. The methods include grinding a semiconductor wafer such that the grind pattern on the wafer is less than ten (10) microns deep. Then, the wafer is etched using an acid etchant. During the etch, less than twenty (20) microns of semiconductor material is removed from a combination of the front and the back of the wafer. In addition, metallic contamination is removed from the wafer. The system includes an integrated grinder and etcher for processing single wafers.

US Patent:

20010024877, Sep 27, 2001

Filed:

Mar 15, 2001

Appl. No.:

09/808790

Inventors:

Krishna Vepa - Livermore CA, US
Duncan Dobson - Woodside CA, US

International Classification:

H01L021/302
H01L021/461
B44C001/22

US Classification:

438/691000, 438/906000, 438/959000, 216/052000

Abstract:

The present invention provides exemplary cluster tool systems and methods for processing wafers, such as semiconductor wafers. One method includes providing a wafer having initial thickness variations between two wafer surfaces. The wafer is processed (Step ) through a first module (), with the first module having apparatus for performing a grinding process, a clean process and a metrology process, all preferably within a clean room environment (). Wafer processing through the first module includes performing the grinding process, clean process and metrology process. The method further includes defining an edge profile on the wafer and processing (Step ) the wafer through a second module ().

US Patent:

20010027082, Oct 4, 2001

Filed:

Mar 15, 2001

Appl. No.:

09/808749

Inventors:

Krishna Vepa - Livermore CA, US
Duncan Dobson - Woodside CA, US

International Classification:

B24B001/00
B24B007/19
B24B007/30

US Classification:

451/041000

Abstract:

The present invention provides exemplary cluster tool systems and methods for processing wafers, such as semiconductor wafers. One method includes providing () a wafer having initial thickness variations between two wafer surfaces. The wafer is subjected to grinding (), polishing () and cleaning () processes. The wafer is thereafter transferred () to a wafer processing chamber to undergo device formation processes (-). The wafer processing steps may be undertaken in a series of process modules of sufficiently small size to permit their use in a circuit device fabrication facility. The in-fab processing of wafers reduces the number of process steps, cost and time typically associated with wafer processing prior to device formation thereon.

US Patent:

20020004265, Jan 10, 2002

Filed:

Mar 19, 2001

Appl. No.:

09/812229

Inventors:

Krishna Vepa - Livermore CA, US
Duncan Dobson - Woodside CA, US

International Classification:

H01L021/8238

US Classification:

438/200000

Abstract:

The present invention provides exemplary cluster tool systems and methods for processing wafers, including for grind polishing wafers to remove grind marks. In one embodiment, a substrate processing system includes a first platen () having a first platen surface adapted for mounting a substrate () thereto, and a second platen () having an annular ring () coupled thereto. The annular ring includes a grinding surface, and the first platen is offset from the second platen to position a portion of the annular ring proximate a center of the substrate. The system further includes a controller () coupled to the platens to facilitate operation thereof. In this manner, the substrate processing system is configured to use an abrasive grinding process for the removal of grind patterns previously disposed in the substrate surface.

US Patent:

20020004358, Jan 10, 2002

Filed:

Mar 15, 2001

Appl. No.:

09/808748

Inventors:

Krishna Vepa - Livermore CA, US
Duncan Dobson - Woodside CA, US

International Classification:

B24B001/00
B24B007/19

US Classification:

451/041000, 451/054000, 451/067000

Abstract:

The present invention further provides exemplary methods and apparatus for grinding wafers, and preparing wafers for such grinding. One method () includes providing () a cut wafer having initial thickness variations between first and second wafer surfaces. A curable liquid, which in one embodiment is a liquid polymer, is applied () to the first wafer surface and cured () to form a substantially smooth outer surface. The wafer is positioned () on a grinding tool to expose the second wafer surface to a grinder for subsequent grinding operations. As a result, waves or undulations in the wafer first surface are not transferred to the wafer second surface during or after grinding.

US Patent:

20020052116, May 2, 2002

Filed:

Mar 19, 2001

Appl. No.:

09/812242

Inventors:

Krishna Vepa - Livermore CA, US
Duncan Dobson - Woodside CA, US

International Classification:

H01L021/302
H01L021/461
C23F001/02

US Classification:

438/692000, 156/345000

Abstract:

The present invention provides exemplary cluster tool systems and methods for processing wafers, such as semiconductor wafers, including exemplary double side polishing (DSP) systems and methods. One DSP system includes a first plate () having a first polishing surface and a second plate () having a second polishing surface. A translator for translating the first plate in a first direction and the second plate in a second direction is included. A carrier (), adapted to receive a wafer () to be polished, is positioned between the first and second plates. The polishing apparatus includes a rotator () adapted to rotate the wafer between the first and second polishing surfaces. In this manner, polishing action occurs from the combination of wafer rotation, first plate translation and second plate translation. Further, the apparatus has a small footprint.

US Patent:

20020052169, May 2, 2002

Filed:

Mar 15, 2001

Appl. No.:

09/809634

Inventors:

Krishna Vepa - Livermore CA, US
Duncan Dobson - Woodside CA, US

International Classification:

B24B049/00

US Classification:

451/011000, 451/041000, 451/285000

Abstract:

The present invention provides systems and methods for varying the speed of a wafer chuck relative to a grinding wheel during the grinding process. The systems and methods involve relative rotation between a wafer and a grinding wheel at a first velocity and subsequently at a second velocity. The variance between the first and second velocities reduces striations on the face of the wafer being ground. In addition, the change in velocity increases the ploughing capability of the grinding element.

US Patent:

20020086625, Jul 4, 2002

Filed:

May 23, 2001

Appl. No.:

09/864889

Inventors:

Krishna Vepa - Livermore CA, US
Duncan Dobson - Woodside CA, US

Assignee:

Wafer Solutions, Inc. - Fremont CA

International Classification:

B24B007/00

US Classification:

451/065000

Abstract:

The present invention provides exemplary methods, systems and apparatus that provide improved substrate characteristics. The present invention may be used in conjunction with or after grinding operations prior to circuit device formation, or alternatively in conjunction with CMP operations on a device wafer between device process steps. In one embodiment, an apparatus () for processing a substrate () includes a rotatable first spindle () having a grind pattern coupled thereto for grinding the substrate. The first spindle is further adapted to receive a polishing pad (). The apparatus includes a second spindle () adapted to hold the substrate, and a gimbal device () coupled to the first spindle and adapted to provide three axis movement thereof. In this manner, the same apparatus may be used for both grinding and polishing of a wafer.