Donald E Caron

US Patent:

6753658, Jun 22, 2004

Filed:

Oct 7, 2002

Appl. No.:

10/181972

Inventors:

Donald Caron - Windham NH

Assignee:

Osram Sylvania, Inc. - Danvers MA

International Classification:

H05B 3702

US Classification:

315209R, 315291, 315307

Abstract:

An electronic ballast circuit (FIG. ) includes a voltage-regulated DC power source and an H-bridge having a plurality of transistors (Q , Q , Q , Q ). The circuit operates a high intensity discharge lamp ( ). A regulating circuit electrically connected to the transistors regulates the peak current flowing through the H-bridge by discharging a parasitic capacitance (C parasitic).

US Patent:

6917529, Jul 12, 2005

Filed:

Dec 2, 2003

Appl. No.:

10/726893

Inventors:

Donald Richard Caron - Windham NH, US

Assignee:

Power-One Limited - Grand Cayman

International Classification:

H02H007/122

US Classification:

363 5612

Abstract:

An unregulated DC-to-DC power converter suitable for intermediate bus voltage converter applications includes synchronous rectifiers that are driven efficiently to provide faster transition time and reduced loss. The DC-to-DC power converter comprises a transformer having a primary winding and at least first and second secondary windings. An input circuit is coupled to the primary winding and is adapted to apply an alternating polarity square wave voltage to the primary winding. An output circuit comprising an output filter is coupled to a tap of the first secondary winding. The output filter provides a DC output voltage. A first synchronous rectifier is coupled to a first end of the first secondary winding and a second synchronous rectifier is coupled to a second end of the first secondary winding. The second secondary winding has a first end coupled to a control terminal of the first synchronous rectifier and a second end coupled to a control terminal of the second synchronous rectifier. A first snubber circuit is coupled between the control terminal of the first synchronous rectifier and the second end of the first secondary winding.

US Patent:

7203041, Apr 10, 2007

Filed:

May 10, 2004

Appl. No.:

10/843406

Inventors:

David Arthur Williams - Andover MA, US
Donald R. Caron - Windham NH, US
Ram Ramabhadran - Waltham MA, US

Assignee:

Power-One, Inc - Camarillo CA

International Classification:

H02M 3/335
H02M 7/219

US Classification:

361 20, 363 2106, 363 2107, 363 37

Abstract:

There is disclosed a power conversion circuit including self synchronous rectifiers and a rapid shutdown section. When power is removed from the power conversion circuit, the rapid shutdown section prevents self oscillation of the self synchronous rectifiers. As a result, power is not drawn from the output and dissipated in the power conversion circuit.

US Patent:

7333350, Feb 19, 2008

Filed:

Dec 21, 2006

Appl. No.:

11/614908

Inventors:

David Arthur Williams - Andover MA, US
Donald R Caron - Windham NH, US
Ram Ramabhadran - Waltham MA, US

Assignee:

Power One, Inc. - Camarillo CA

International Classification:

H02M 3/335

US Classification:

363 17, 363 53, 363127

Abstract:

There is disclosed a power conversion circuit comprising a transformer having a primary side driven by an input section and a secondary side connected to first and second self-driven synchronous rectifiers. A shutdown section includes a control section adapted to detect a predetermined condition and means for shorting a winding of the transformer upon detection of the predetermined condition.

US Patent:

53074874, Apr 26, 1994

Filed:

Oct 3, 1991

Appl. No.:

7/770208

Inventors:

Carlos M. Tavares - Somerset MA
Durval M. Tavares - Dighton MA
Donald R. Caron - Bristol RI
John B. Bagley - Portsmouth RI

Assignee:

The United States of America as represented by the Secretary of the Navy - Washington DC

International Classification:

G06F 1540

US Classification:

395650

Abstract:

A system for updating and reading a data base utilizes a pair of counters ere one counter is incremented prior to an update and the other is incremented following an update. The system permits the updating to take place at any time. By keeping track of the value of the counters the system either inhibits the reading from taking place during the updating if the updating commenced prior to the commencement of the reading or provides information that an updating occurred during the reading if the reading commenced prior to the commencement of the updating. The counters and data base are located within the RAM of a computer. The system has a first application program that gives information to a second application program via these RAM based components.