David M Blaker

US Patent:

6691143, Feb 10, 2004

Filed:

May 4, 2001

Appl. No.:

09/849667

Inventors:

David M. Blaker - Chapel Hill NC

Assignee:

CyberGuard Corporation - Ft. Lauderdale FL

International Classification:

G06F 738

US Classification:

708491

Abstract:

Montgomery multipliers and methods modular multiply a residue multiplicand by a residue multiplier to obtain a residue product, using a scalar multiplier, a first vector multiplier and a second vector multiplier. A controller is configured to control the scalar multiplier, the first vector multiplier and the second vector multiplier, to overlap scalar multiplies using a selected digit of the multiplier and vector multiplies using a modulus and the multiplicand. The scalar multiplier is configured to multiply a least significant digit of the multiplicand by a first selected digit of the multiplier, to produce a scalar multiplier output. The first vector multiplier is configured to multiply the scalar multiplier output by a modulus, to produce a first vector multiplier output. The second vector multiplier is configured to multiply a second selected digit of the multiplier by the multiplicand, to produce a second vector multiplier output. An accumulator is configured to add the first vector multiplier output, and the second vector multiplier output, to produce a product output.

US Patent:

6820105, Nov 16, 2004

Filed:

May 4, 2001

Appl. No.:

09/849853

Inventors:

David M. Blaker - Chapel Hill NC

Assignee:

CyberGuard Corporation - Ft. Lauderdale FL

International Classification:

G06F 772

US Classification:

708491, 708492

Abstract:

Montgomery exponentiators and methods modulo exponentiate a generator (g) to a power of an exponent (e). The Montgomery exponentiators and methods include a first multiplier that is configured to repeatedly square a residue of the generator, to produce a series of first multiplier output values at a first multiplier output. A second multiplier is configured to multiply selected ones of the series of first multiplier output values that correspond to a bit of the exponent that is binary one, by a partial result, to produce a series of second multiplier output values at a second multiplier output. By providing two multipliers that are serially coupled as described above, Montgomery exponentiation can be accelerated.

US Patent:

8189591, May 29, 2012

Filed:

Oct 30, 2001

Appl. No.:

09/999647

Inventors:

David M. Blaker - Chapel Hill NC, US
Raymond Savarda - Apex NC, US

Assignee:

Exar Corporation - Fremont CA

International Classification:

H04L 12/56

US Classification:

370394, 370473

Abstract:

Packets are processed while maintaining a sequence of the packets. Packets are received and a sequence identifier assigned to the packets. The sequence identifier specifies a serial order associated with the packet. The packets are provided to a plurality of parallel packet transform processors and the packets are processed utilizing the packet transform processors. The processed packets are ordered based on the sequence identifier of the packets. The packets may be evaluated to classify the packets so as to identify related packets. A sequence identifier is assigned to the packets such that the sequence identifier identifies an ordering of the related packets. The processed packets are ordered based on the classification of the packets and the sequence identifier of the packets. Parallel packet transform processing may be particularly well suite to parallel cryptographic processing.

US Patent:

20010042204, Nov 15, 2001

Filed:

Apr 30, 2001

Appl. No.:

09/845432

Inventors:

David Blaker - Chapel Hill NC, US
Dan Winkelstein - Raleigh NC, US

International Classification:

G06F012/14
G06F017/30

US Classification:

713/165000, 713/193000, 707/009000

Abstract:

Data structures and methods, systems and computer program products for searching, inserting and/or deleting entries in a database which includes a hash value corresponding to data of the entry and which are stored in a hash-ordered sequence such that a linear search for an entry from an address corresponding to the hash value of the entry will result in the data being located by examining entries in consecutive addresses before an address without an entry is reached are provided. Such methods, systems, computer program products and data structures may be particularly useful for Internet Protocol Security (IPSec) security association databases (SADs).

US Patent:

20010042210, Nov 15, 2001

Filed:

May 10, 2001

Appl. No.:

09/852562

Inventors:

David Blaker - Chapel Hill NC, US
Raymond Savarda - Apex NC, US
Michael Hanna - Raleigh NC, US

International Classification:

G06F012/14

US Classification:

713/190000

Abstract:

Embodiments of cryptographic data processing systems, computer program products, and methods of operating same are provided in which system memory is used to transfer information between a host processor and an adjunct processor.

US Patent:

20020004904, Jan 10, 2002

Filed:

May 10, 2001

Appl. No.:

09/852937

Inventors:

David Blaker - Chapel Hill NC, US
Raymond Savarda - Apex NC, US
Michael Hanna - Raleigh NC, US

International Classification:

G06F012/14

US Classification:

713/190000

Abstract:

Embodiments of cryptographic data processing systems, computer program products, and methods of operating same are provided. For example, cryptographic data processing systems include a host processor, a system memory coupled to the host processor, and a cryptographic processor integrated circuit that comprises a local memory. One or more operands are downloaded into the local memory from the system memory and the cryptographic processor executes an instruction that references one of the downloaded operands using a first relative position in the local memory. Operands and results may be packed together in the local memory, which may conserve storage space. In other embodiments, separate command interfaces are provided that are respectively associated with execution units in the cryptographic processor. Commands blocks are respectively provided to the execution units and these command blocks are executed simultaneously by the plurality of execution units. By performing operations in parallel using a plurality of functional units, the total number of operations that may be performed may be increased and the average latency for completing operations may be reduced.

US Patent:

20030081772, May 1, 2003

Filed:

Oct 30, 2001

Appl. No.:

10/004081

Inventors:

David Blaker - Chapel Hill NC, US

International Classification:

H04L009/00

US Classification:

380/042000

Abstract:

Parallel generation of random values of a stream cipher utilizing a common S-box is provided. The generation of the values includes determining if a collision exists between accesses of the common S-box. The determination of the two sequential random values is then modified based on whether a collision exists between accesses of the common S-box. The stream cipher may be the ARC-4 cipher.

US Patent:

20030196081, Oct 16, 2003

Filed:

Apr 11, 2002

Appl. No.:

10/120577

Inventors:

Raymond Savarda - Apex NC, US
David Blaker - Chapel Hill NC, US
Dan Winkelstein - Raleigh NC, US

International Classification:

H04L009/00

US Classification:

713/153000, 713/200000

Abstract:

A packet is processed by encapsulating the packet with a packet-object header if the packet does not have a packet-object header. The encapsulated packet is processed based on information contained in the packet-object header using a plurality of transform modules that are coupled to each other in a series or pipeline configuration. The plurality of transform modules process the encapsulated packet independent of each other.