Daniel C Schartz

US Patent:

7532696, May 12, 2009

Filed:

Nov 18, 2004

Appl. No.:

10/991811

Inventors:

Patrick J. Pratt - Mallow, IE
Michael A. Milyard - Chandler AZ, US
Louis M. Nigra - Chicago IL, US
Daniel B. Schartz - Gold Canyon AZ, US

Assignee:

Freescale Semiconductor, Inc. - Austin TX

International Classification:

H03D 3/24

US Classification:

375376, 375302, 375215, 375373, 375375, 327156, 4551803

Abstract:

A calibration device for a phase locked loop arranged to generate an output frequency based upon a first frequency range of an input signal applied to a first input and a second frequency range of the input signal applied to a second input, the calibration phase locked loop synthesizer device comprising an estimator arranged to use a two dimensional estimation algorithm with a signal value indicative of a mismatch between the first input path and the second input path to determine an estimate of the mismatch to allow matching of the first input path and the second input path.