Daniel H Knox

US Patent:

20040049708, Mar 11, 2004

Filed:

Sep 6, 2002

Appl. No.:

10/236834

Inventors:

Thomas Thomas - Austin TX, US
Daniel Knox - Austin TX, US

International Classification:

G06F001/04
G06F001/06
G06F001/08

US Classification:

713/500000

Abstract:

A clock distribution and control system () includes one counter () in a clock generation domain and another counter () in a phase-delayed clock domain. The phase-delayed domain counter () output is combined with a programmable offset value chosen based on the phase delay of the clock distribution system. The result is used to insure that communication between logic in the clock generation clock domain and logic in the phase-delayed clock domain occurs deterministically on the correct clock edge for a range of clock frequencies.