Dale S Wedel

US Patent:

6933785, Aug 23, 2005

Filed:

May 28, 2003

Appl. No.:

10/447629

Inventors:

Dale S. Wedel - Loveland CO, US

Assignee:

Fairchild Semiconductor Corporation - South Portland ME

International Classification:

H03F003/26

US Classification:

330265, 330290

Abstract:

An output circuit is described, which includes a gain stage, n and p drives, coupled to the gain stage, a mean current generator, coupled to the drives, a reference current generator, coupled to the mean current generator, and feedback circuitry, coupled between the gain stage and the mean current generator. In this circuitry the feedback, provided by the feedback circuitry to the mean current generator, is a current mode feedback. The mean current generator generates the harmonic mean of currents, provided through current nodes. The described output circuit can be operated by providing currents at the current nodes of the mean current generator, generating a mean of provided currents with the mean current generator, and providing a current mode feedback by the feedback circuitry to the mean current generator. The feedback circuitry computes the difference between the generated mean current and a reference current.

US Patent:

7285990, Oct 23, 2007

Filed:

Jan 14, 2004

Appl. No.:

10/757115

Inventors:

Steven O. Smith - Brownfield ME, US
Dale S. Wedel - Loveland CO, US

Assignee:

Fairchild Semiconductor Corporation - South Portland ME

International Classification:

H03K 3/00

US Classification:

327108, 327109, 327110, 327111, 327112, 327538, 326 82, 326 83, 326 84, 326 85, 326 86

Abstract:

A buffer circuit includes an input terminal operable to receive an input signal and an output terminal at which an output signal for the buffer circuit is provided. In the buffer circuit, three transistors at most provide signal currents. Two of the three transistors can be matched. Means are provided for feeding back the output signal so that the two matched transistors are balanced in response to a change in the input signal appearing at the input terminal.

US Patent:

7538614, May 26, 2009

Filed:

Nov 9, 2007

Appl. No.:

11/937852

Inventors:

Dale S. Wedel - Loveland CO, US

Assignee:

Fairchild Semiconductor Corporation - South Portland ME

International Classification:

H03F 3/45

US Classification:

330258, 330257

Abstract:

A fully differential amplifier with a high common mode rejection ratio with an independent output voltage setting is disclosed. The amplifier may be arranged with a single ended output or a differential output. The gain may be set by adjusting a resistor without affecting bandwidth of the circuit. The circuit exhibits high speed and may be implemented with various electronic component types. The DC voltage of the output, single ended or differential, may be adjusted by adjusting a reference voltage, wherein the output voltage adjustment does not substantially affect the performance of the differential amplifier.

US Patent:

20030214279, Nov 20, 2003

Filed:

May 15, 2002

Appl. No.:

10/146863

Inventors:

Dale Wedel - Loveland CO, US

International Classification:

G05F003/16

US Classification:

323/315000

Abstract:

An apparatus for current mirroring is provided. In one embodiment, the apparatus includes an input node into which an input current can flow. A transistor, through which an output current can flow, servos the input current. The transistor has an emitter, a base, and a collector. A resistor is coupled to the emitter of the first transistor. The output current can flow through the resistor. A feedback circuit has a control terminal coupled to the emitter of the first transistor and the resistor. A voltage across the resistor acts as a control voltage for the feedback circuit. The feedback circuit provides a correction current to the input node, thereby reducing the error between the output current and the input current.

US Patent:

20190063967, Feb 28, 2019

Filed:

Aug 27, 2018

Appl. No.:

16/113845

Inventors:

- Fremont CA, US
Dale Wedel - Fremont CA, US

International Classification:

G01D 18/00
G05B 19/042

Abstract:

A system supporting enhanced programmable signal adjustments may include a plurality of circuits configured to generate a corresponding plurality of input signals; a signal conditioner configured to condition the plurality of signals; and a controller configured to control the signal conditioner. The controller may generate one or more control signals for the controlling of the signal conditioner. The signal conditioner may select one or more input signals from the plurality of input signals, based on a first control signal generated by the controller; may generate an adjustment signal based on a second control signal generated by the controller; and may adjust at least one of the selected one or more input signals based on the adjustment signal and a third control signal generated by the controller.

US Patent:

20180149499, May 31, 2018

Filed:

Nov 28, 2017

Appl. No.:

15/824217

Inventors:

- Fremont CA, US
Dale Wedel - Fremont CA, US

International Classification:

G01D 18/00

Abstract:

Enhanced multi-channel sensor interfaces with programmable signal adjustments are provided. An example sensor interface may include an input selector that selects one or more sensor signals from a plurality of sensor signals based on input selection control signal; an offset generator that generates an offset signal based on an offset control signal; and a programmable signal adjuster that adjusts at least one selected sensor signal based on the generated offset signal and a signal adjustment control signal. The sensor interface may include a control interface unit that generates the input selection control signal, the offset control signal, and the signal adjustment control signal. The sensor interface may include a comparator that compares output of the programmable signal adjuster with a reference signal, and provides based on the comparison an output configured for use in performing offset correction. The programmable signal adjuster may generate a number of selectable gains.

US Patent:

20170363450, Dec 21, 2017

Filed:

Jun 20, 2016

Appl. No.:

15/187730

Inventors:

- Fremont CA, US
Dale Wedel - Fremont CA, US

International Classification:

G01D 18/00
G01D 5/16

Abstract:

A highly integrated programmable sensor interface with improved sensor signal calibration and conditioning functions is described. The programmable sensor interface according to the present invention sensor interface provides programmable gain, digital offset correction and bias for one or more signal channels on one chip on a per channel basis. According to another aspect of the invention, the sensor interface provides reference voltage and sensor biasing by using an on-chip precision voltage regulator. According to one aspect of the invention, multiple inputs are multiplexed and each is applied to a variable gain instrumentation amplifier, which connects to the output. The offset of a given channel is controlled by an on-chip DAC which has multiple digital storage registers, allowing each channel to have a unique, stored offset. Offsets and gains are programmed externally.