Dale T Trenary

US Patent:

49806386, Dec 25, 1990

Filed:

May 26, 1989

Appl. No.:

7/358303

Inventors:

John A. Dermon - Palo Alto CA
Dale T. Trenary - Vancouver WA

International Classification:

G01R 106

US Classification:

324158P

Abstract:

An electrically conductive probe of controlled shape and dimension useful in testing the functionality and performance of microcircuits and a method for manufacturing it are disclosed. The probe may be generally square or rectangular in cross section and consists of three distinct sections; the terminal end which is capable of being electrically contacted, the shaft which connects the terminal end to the probe tip, and the probe tip which is to make electrical contact with a microcircuit.

US Patent:

49658654, Oct 23, 1990

Filed:

Oct 11, 1989

Appl. No.:

7/255779

Inventors:

Dale T. Trenary - San Jose CA

Assignee:

General Signal Corporation - Stamford CT

International Classification:

G01R 3102
G01R 106

US Classification:

324158P

Abstract:

A probe card provides an interconnection between pads on an integrated circuit chip and leads on a printed circuit board to test the chip operability. The card includes a dielectric substrate having a substantially planar surface and at least one channel disposed in such surface in a particular direction. Electrically conductive material is disposed in the channel to contact a conductive, preferably resilient, probe having a first portion disposed in the channel in abutting relationship with the planar surface on the support. Detents are provided in mating relationship in the channel and on the support to position the probe precisely in the channel. A second probe portion extends from the first portion at an angle to the first portion. A probe tip is at the end of the second portion to contact a pad on the chip. Additional detents may be provided on the support, either (a) in or (b) displaced from the channel and on the first portion of the probe to facilitate the precise positioning of the probe in the particular direction.

US Patent:

43343481, Jun 15, 1982

Filed:

Mar 5, 1981

Appl. No.:

6/240879

Inventors:

Dale T. Trenary - San Jose CA
Allen H. Frederick - Pacifica CA
Robert M. Whelton - Paradise Valley AZ

Assignee:

Data General Corporation - Westboro MA

International Classification:

H01L 2122
H01L 2128

US Classification:

29571

Abstract:

A method of electrically isolating a plurality of semiconductor integrated circuit components and for forming gate elements for silicon gate transistors is disclosed whereby extremely narrow line widths can be formed which heretofore have been unattainable by practicing conventional photolithography.

US Patent:

43187595, Mar 9, 1982

Filed:

Jul 21, 1980

Appl. No.:

6/170833

Inventors:

Dale T. Trenary - San Jose CA
Allen H. Frederick - Pacifica CA
Robert M. Whelton - Paradise Valley AZ

Assignee:

Data General Corporation - Westboro MA

International Classification:

H01L 2122
H01L 21308

US Classification:

148187

Abstract:

A method of electrically isolating a plurality of semiconductor integrated circuit components and for forming gate elements for silicon gate transistors is disclosed whereby extremely narrow line widths can be formed which heretofore have been unattainable by practicing conventional photolithography.