Cuong M Bui

US Patent:

54791278, Dec 26, 1995

Filed:

Nov 10, 1994

Appl. No.:

8/337257

Inventors:

Cuong M. Bui - San Jose CA

Assignee:

National Semiconductor Corporation - Santa Clara CA

International Classification:

G01R 1900
H03L 700

US Classification:

327174

Abstract:

A self-resetting bypass control circuit is disclosed for use with scan testing of integrated circuits. The bypass control circuit includes a shift register and an OR gate. A test-enable signal is input to the shift register and to the OR gate, and the output of the shift register is also input to the OR gate. The output of the OR gate is a bypass signal that goes logic high immediately when the test enable signal goes logic high, that stays logic high while the test enable signal goes logic low momentarily, and that resets to logic low when the test enable signal goes logic low for an extended period of time.