Christopher T Parker

Author:

Christopher Parker

ISBN #:

0566050099

Author:

Christopher Parker

ISBN #:

0566050102

Author:

Christopher Parker

ISBN #:

0471902780

Author:

Christopher Parker

ISBN #:

0859762939

Author:

Christopher W. Parker

ISBN #:

0934012008

Address:

6107 NE 79 Ave, Vancouver, WA 98662

VIN:

1D7HU18277S235471

Make:

DODGE

Model:

RAM PICKUP 1500

Year:

2007

Address:

6538 Maryibel Cir, Dallas, TX 75237

VIN:

2B3KA43R77H796938

Make:

DODGE

Model:

CHARGER

Year:

2007

US Patent:

6689675, Feb 10, 2004

Filed:

Oct 31, 2002

Appl. No.:

10/285915

Inventors:

Christopher G. Parker - Portland OR
Markus Kuhn - Hillsboro OR
Ying Zhou - Tigard OR

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H01L 213205

US Classification:

438585, 438287, 438591, 438770, 438772, 438785

Abstract:

A method for making a semiconductor device is described. That method comprises forming a high-k gate dielectric layer on a substrate, oxidizing the surface of the high-k gate dielectric layer, and then forming a gate electrode on the oxidized high-k gate dielectric layer.

US Patent:

6713358, Mar 30, 2004

Filed:

Nov 5, 2002

Appl. No.:

10/288043

Inventors:

Robert S. Chau - Beaverton OR
Timothy E. Glassman - Portland OR
Christopher G. Parker - Portland OR
Matthew V. Metz - Hillsboro OR
Lawrence J. Foley - Hillsboro OR
Reza Arghavani - Aloha OR
Douglas W. Barlage - Durham NC

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H01L 21336

US Classification:

438287, 438591

Abstract:

A method for making a semiconductor device is described. That method comprises forming a high-k gate dielectric layer on a substrate. After forming a silicon nitride layer on the high-k gate dielectric layer, a gate electrode is formed on the silicon nitride layer.

US Patent:

6787440, Sep 7, 2004

Filed:

Dec 10, 2002

Appl. No.:

10/315268

Inventors:

Christopher G. Parker - Portland OR
Markus Kuhn - Hillsboro OR
Ying Zhou - Tigard OR
Scott A. Hareland - Tigard OR
Suman Datta - Beaverton OR
Nick Lindert - Beaverton OR
Robert S. Chau - Beaverton OR
Timothy E. Glassman - Portland OR
Matthew V. Metz - Hillsboro OR
Sunit Tyagi - Portland OR

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H01L 214763

US Classification:

438591, 438216, 438287, 438785

Abstract:

A method for making a semiconductor device is described. That method comprises forming on a substrate a buffer layer and a high-k gate dielectric layer, oxidizing the surface of the high-k gate dielectric layer, and then forming a gate electrode on the oxidized high-k gate dielectric layer.

US Patent:

8572867, Nov 5, 2013

Filed:

Jan 16, 2008

Appl. No.:

12/014974

Inventors:

Christopher O. Parker - Tualatin OR, US

Assignee:

NIKE, Inc. - Beaverton OR

International Classification:

A43B 13/20

US Classification:

36 29, 36153, 36 28

Abstract:

Several sole components and a method of manufacturing those sole components are disclosed. In general, each sole component includes a fluid-filled bladder and a reinforcing element extending around a portion of the bladder. The reinforcing element is bonded to the exterior of the bladder, and may be recessed into the bladder. In some configurations, the reinforcing element is die-cut from a sheet of polymer material, and the reinforcing element may exhibit a layered configuration. In manufacturing the sole component, the reinforcing element may be located within a mold, and the polymer material forming the bladder may be bonded to the reinforcing element during the molding process.

US Patent:

20060045968, Mar 2, 2006

Filed:

Aug 25, 2004

Appl. No.:

10/925573

Inventors:

Matthew Metz - Hillsboro OR, US
Mark Brazier - Manning OR, US
Timothy Glassman - Portland OR, US
Christopher Thomas - Aloha OR, US
Lawrence Foley - Hillsboro OR, US
Christopher Parker - Hillsboro OR, US
Ying Zhou - Tigard OR, US
Markus Kuhn - Portland OR, US
Suman Datta - Beaverton OR, US
Jack Kavalieros - Portland OR, US
Mark Doczy - Beaverton OR, US
Justin Brask - Portland OR, US
Robert Chau - Beaverton OR, US

International Classification:

C23C 16/00

US Classification:

427248100

Abstract:

Increasing the number of successive pulses of oxidant before applying pulses of metal precursor may improve the quality of the resulting metal or rare earth oxide films. These metal or rare earth oxide films may be utilized for high dielectric constant gate dielectrics. In addition, pulsing the oxidant during the pre-stabilization period may be advantageous. Also, using more pulses of oxidant than the pulses of precursor may reduce chlorine concentration in the resulting films.

US Patent:

61157228, Sep 5, 2000

Filed:

Dec 9, 1998

Appl. No.:

9/208118

Inventors:

Amando B. Isip - Richardson TX
Christopher F. Parker - Oswego IL
Stephen J. Weaver - Lisle IL

Assignee:

Computer Associates Think, Inc. - Islandia NY

International Classification:

G06F 1730

US Classification:

707202

Abstract:

A recover or reload utility determines if a check utility is to be executed. If a check utility is to be executed, the recover or reload utility records the dependent tablespace names to virtual storage allocated to a job step instead of to virtual storage allocated to a subtask. After the recover or reload utility performs its function, if a check utility is next, the database operating system will not freemain the virtual storage (e. g, data area) into which the recover or reload utility has recorded the names of the dependent tablespaces when the subtask ends. Upon termination of the recover or reload utility, the persistent data area is available for the check utility to use.

US Patent:

20220211144, Jul 7, 2022

Filed:

Mar 25, 2022

Appl. No.:

17/704277

Inventors:

- Beaverton OR, US
Christopher O. Parker - Tualatin OR, US

Assignee:

NIKE, Inc. - Beaverton OR

International Classification:

A43B 13/18
A43B 13/20
B29D 35/12
A43B 13/14
A43B 13/04
A43B 13/12

Abstract:

Several sole components and a method of manufacturing those sole components are disclosed. In general, each sole component includes a fluid-filled bladder and a reinforcing element extending around a portion of the bladder. The reinforcing element is bonded to the exterior of the bladder, and may be recessed into the bladder. In some configurations, the reinforcing element is die-cut from a sheet of polymer material, and the reinforcing element may exhibit a layered configuration. In manufacturing the sole component, the reinforcing element may be located within a mold, and the polymer material forming the bladder may be bonded to the reinforcing element during the molding process.

US Patent:

20220199458, Jun 23, 2022

Filed:

Dec 18, 2020

Appl. No.:

17/127860

Inventors:

- Santa Clara CA, US
Sudipto Naskar - Portland OR, US
Ryan Pearce - Beaverton OR, US
Nita Chandrasekhar - Portland OR, US
Minyoung Lee - Vancouver WA, US
Christopher Parker - Portland OR, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H01L 21/762
H01L 21/02
H01L 29/66
H01L 29/06
H01L 29/78

Abstract:

Transistors structures comprising a semiconductor features and dielectric material comprising silicon and oxygen in gaps or spaces between the features. The dielectric material may fill the gaps from bottom-up with an atomic layer deposition (ALD) process that includes a silicon deposition phase, and an oxidation phase augmented by N:NHplasma activated nitrogen species. Being plasma activated, the nitrogen species have short mean free paths, and therefore preferentially passivate surfaces with low aspect ratios. This aspect-ratio dependent passivation may increase an energy barrier to surface reactions with a silicon precursor, resulting in a concomitant differential in deposition rate. With N:NHplasma passivation, deposited dielectric material may have a nitrogen concentration that varies by at least order of magnitude as a function of the aspect ratio of the filled gaps.