Charles W Brokish

US Patent:

6665695, Dec 16, 2003

Filed:

Nov 15, 2000

Appl. No.:

09/713417

Inventors:

Charles W. Brokish - Poynette WI
Jamil Chaoui - Le Rouret, FR
David M. Alter - Burlington MA

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

G06F 1710

US Classification:

708322, 708319

Abstract:

A delayed adaptive least-mean-square (LMS) filter, which has one filter coefficient per tap and acquires a new data sample each frame, calculates a finite impulse response (FIR) filter output and updates the filter coefficients using an error term based on the FIR filter output calculated during the preceding frame. The calculations for each tap are performed in a single clock cycle. The filter can be implemented using a general purpose, programmable digital signal processor (DSP) architecture having two multiply and accumulate circuits (MACs), with or without an arithmetic logic unit (ALU), and preferably implements its memory buffers as dual-access or dual-port RAM or banked memory.

US Patent:

6665696, Dec 16, 2003

Filed:

Jul 1, 2002

Appl. No.:

10/187187

Inventors:

Charles W. Brokish - Kingston IL

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

G06F 1710

US Classification:

708322

Abstract:

A delayed adaptive least-mean-square (LMS) filter, which has one filter coefficient per tap and acquires a new data sample each frame, calculates a finite impulse response (FIR) filter output and updates the filter coefficients using an error term based on the FIR filter output calculated during the preceding frame. The calculations for each tap are performed in a single clock cycle. The filter can be implemented using a general purpose, programmable digital signal processor (DSP) architecture having two multiply and accumulate circuits (MACs), with or without an arithmetic logic unit (ALU), and preferably implements its memory buffers as dual-access or dual-port RAM or banked memory.

US Patent:

7500130, Mar 3, 2009

Filed:

Jan 17, 2006

Appl. No.:

11/333017

Inventors:

Charles W. Brokish - Poynette WI, US

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

G06F 1/04
G06F 1/14

US Classification:

713502, 713500, 713501, 713503

Abstract:

Cycle-accurate real-time clocks and methods to operate the same are disclosed. An example real-time clock comprises a first counter to count cycles of a selectively-operable clock, a multiplexer to select from at least an output signal associated with the first counter or a continuously-operating clock, and a second counter to count cycles of an output signal of the multiplexer.

US Patent:

8112618, Feb 7, 2012

Filed:

Aug 10, 2004

Appl. No.:

10/915830

Inventors:

Charles W. Brokish - Poynette WI, US
Narendar Madurai Shankar - Dallas TX, US
Erdal Paksoy - Richardson TX, US
Steve Karouby - Antibes, FR
Olivier Schuepbach - Antibes, FR

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

G06F 9/00
G06F 15/177
G06F 9/24

US Classification:

713 2, 713 1, 713100, 713166

Abstract:

An integrated circuit () includes an on-chip boot ROM () holding boot code, a non-volatile security identification element () having non-volatile information determining a less secure type or more secure type, and a processor (). The processor () is coupled to the on-chip boot ROM () and to the non-volatile security identification element () to selectively execute boot code depending on the non-volatile information of the non-volatile security identification element(). Other technology such as processors, methods of operation, processes of manufacture, wireless communications apparatus, and wireless handsets are also disclosed.

US Patent:

20030046614, Mar 6, 2003

Filed:

May 29, 2002

Appl. No.:

10/157617

Inventors:

Charles Brokish - Poynette WI, US

International Classification:

G06F011/30

US Classification:

714/038000

Abstract:

An operating system (OS) is used in a system with a processor that includes embedded real-time analysis components. The OS includes software objects which provide functionality in response to signals from the embedded real-time analysis components. In an example embodiment, the OS is a real-time OS (RTOS), the embedded real-time analysis components include an embedded event trigger component, and the software objects include a debug object that responds to signals from the embedded event trigger component. For instance, those signals may relate to program flow, data flow, or a hardware operation such as a cache miss, and the debug object may be a breakpoint handler, a trace handler, or an event sequence handler. In the example embodiment, the software objects in the RTOS provide functionality such as stack overflow detection, real-time task priority modification, and/or system scheduling error assertion for a real-time application. Alternative embodiments involve related methods and systems.

US Patent:

20120110659, May 3, 2012

Filed:

Jan 9, 2012

Appl. No.:

13/345912

Inventors:

Charles W. Brokish - Poynette WI, US
Narender Madurai Shankar - Dallas TX, US
Erdal Paksoy - Richardson TX, US
Steve Karouby - Antibes, FR
Olivier Schuepach - Antibes, FR

Assignee:

TEXAS INSTRUMENTS INCORPORATED - DALLAS TX

International Classification:

G06F 21/00

US Classification:

726 16

Abstract:

An integrated circuit () includes an on-chip boot ROM () holding boot code, a non-volatile security identification element () having non-volatile information determining a less secure type or more secure type, and a processor (). The processor () is coupled to the on-chip boot ROM () and to the non-volatile security identification element () to selectively execute boot code depending on the non-volatile information of the non-volatile security identification element (). Other technology such as processors, methods of operation, processes of manufacture, wireless communications apparatus, and wireless handsets are also disclosed.

US Patent:

57153205, Feb 3, 1998

Filed:

Aug 21, 1995

Appl. No.:

8/517464

Inventors:

Mark C. Allie - Oregon WI
Larry J. Eriksson - Madison WI
Charles W. Brokish - Madison WI

Assignee:

Digisonix, Inc. - Middleton WI

International Classification:

H03B 2900

US Classification:

381 7112

Abstract:

An active adaptive control system introduces a control signal from an output transducer (14) to combine with the system input signal (6) and yield a system output signal (8). An error transducer (16) senses the system output signal and provides an error signal (44). An adaptive filter model (40) has a model input from a reference signal (42) correlated to the system input signal, and an output outputting a correction signal (46) to the output transducer to introduce the control signal. Performance of the model is selectively controlled to control the signal sent to the output transducer. Various monitoring and control methods are provided, including spectral leak signal monitoring and control, correction signal monitoring and control, frequency responsive spectral transfer function processing of the leak signal and/or the correction signal, reference signal processing, and fuzzy logic control.