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Boonmi A Mekdhanasarn

age ~74

from Sunnyvale, CA

Also known as:
  • Bonnmi Mekdhanasarn
  • Boomni Mekdhanasarn
  • Bo Mekdhanasarn
  • Mekdhanasarn Boonmi
  • I N
Phone and address:
823 Durshire Way, Sunnyvale, CA 94087
408 730-4990

Boonmi Mekdhanasarn Phones & Addresses

  • 823 Durshire Way, Sunnyvale, CA 94087 • 408 730-4990
  • 823 Durshire Way, Sunnyvale, CA 94087

Work

  • Company:
    National semiconductor
  • Position:
    Senior packaging engineer

Industries

Semiconductors

Us Patents

  • Integrated Esd Protection Method And System

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  • US Patent:
    6344412, Feb 5, 2002
  • Filed:
    Mar 10, 2000
  • Appl. No.:
    09/522725
  • Inventors:
    Steven Ichikawa - Fremont CA
    Boonmi Mekdhanasarn - Sunnyvale CA
    Abdul R. Ahmed - Morgan Hill CA
  • Assignee:
    National Semiconductor Corporation - Santa Clara CA
  • International Classification:
    H01L 2144
  • US Classification:
    438661, 438681
  • Abstract:
    An ESD structure is created on an integrated circuit by providing a conductive polymer material between a signal line and a supply node or ground reference. The conductive polymer material becomes conductive when an electric field of sufficient intensity is applied. In one embodiment, the concentration of conductive particles of the conductive polymer material is empirically determined so that the resulting film becomes conducting at a predetermined threshold voltage. The conductive polymer is applied in liquid form on the wafer surface using a silk-screen printing process or a spin-on process and then cured. The conductive polymer layer can be adapted for use in multilevel metallization systems.
  • Seal For Lcd Devices And Methods For Making Same

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  • US Patent:
    6357763, Mar 19, 2002
  • Filed:
    Nov 4, 1998
  • Appl. No.:
    09/186297
  • Inventors:
    Ranjan J. Mathew - San Jose CA
    Boonmi Mekdhanasarn - Sunnyvale CA
  • Assignee:
    National Semiconductor Corporation - Santa Clara CA
  • International Classification:
    G02F 113
  • US Classification:
    277628, 349155, 349190, 277233, 350160
  • Abstract:
    The present invention provides an improved seal for sealing a liquid crystal display (LCD) device. An improved seal is formed between a transparent plate and a die having a pixel array. The improved seal is configured to encircle the pixel array of the die when the die and the transparent plate are joined. The die and the transparent plate are joined together such that the improved seal is disposed between the transparent plate and the die. In one embodiment, the improved seal is a hybrid seal. The hybrid seal includes a first seal encircling the pixel array of the die and adhesively coupling the transparent plate and the die. The hybrid seal further includes a second seal encircling the second seal. In another embodiment, the first seal lacks a characteristic necessary for an effective seal. The second seal possesses the characteristic, such that the hybrid seal possesses the necessary characteristic.
  • Method For Attaching A Lead Frame To A Heat Spreader/Heat Slug Structure

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  • US Patent:
    6479323, Nov 12, 2002
  • Filed:
    Jul 10, 1997
  • Appl. No.:
    08/891025
  • Inventors:
    Boonmi Mekdhanasarn - Sunnyvale CA
    Daniel P. Tracy - San Jose CA
  • Assignee:
    National Semiconductor Corporation - Santa Clara CA
  • International Classification:
    H01L 2148
  • US Classification:
    438111, 438118, 438122, 438123, 438124, 438127, 257675
  • Abstract:
    A method and structure for attaching a lead frame to a heat sink are provided. In one embodiment, a layer of thermally conductive, electrically insulating epoxy is formed on a heat sink and the epoxy layer is fully cured. A thermoplastic adhesive layer is formed on the epoxy layer, and the heat sink is clamped to the lead frame such that the thermoplastic layer contacts the lead frame. The thermoplastic layer is heated to its melting point and then cooled, thereby joining the heat sink and the lead frame. In a variation, a partially cured B-stage epoxy layer is used to replace the thermoplastic layer. The B-stage epoxy layer is fully cured to connect the lead frame to the heat sink.
  • Integrated Esd Protection Method And System

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  • US Patent:
    6534422, Mar 18, 2003
  • Filed:
    Jun 10, 1999
  • Appl. No.:
    09/330255
  • Inventors:
    Steven Ichikawa - Fremont CA
    Boonmi Mekdhanasarn - Sunnyvale CA
    Abdul R. Ahmed - Morgan Hill CA
  • Assignee:
    National Semiconductor Corporation - Santa Clara CA
  • International Classification:
    H01L 2131
  • US Classification:
    438780, 438781, 438778
  • Abstract:
    An ESD structure is created on an integrated circuit by providing a conductive polymer material between a signal line and a supply node or ground reference. The conductive polymer material becomes conductive when an electric field of sufficient intensity is applied. In one embodiment, the concentration of conductive particles of the conductive polymer material is empirically determined so that the resulting film becomes conducting at a predetermined threshold voltage. The conductive polymer is applied in liquid form on the wafer surface using a silk-screen printing process or a spin-on process and then cured. The conductive polymer layer can be adapted for use in multilevel metallization systems.
  • Structure For Attaching A Lead Frame To A Heat Spreader/Heat Slug Structure

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  • US Patent:
    56915675, Nov 25, 1997
  • Filed:
    Sep 19, 1995
  • Appl. No.:
    8/530772
  • Inventors:
    Boonmi Mekdhanasarn - Sunnyvale CA
    Daniel P. Tracy - San Jose CA
  • Assignee:
    National Semiconductor Corporation - Santa Clara CA
  • International Classification:
    H01L 23495
    H01L 2348
  • US Classification:
    257675
  • Abstract:
    A method and structure for attaching a lead frame to a heat sink are provided. In one embodiment, a layer of thermally conductive, electrically insulating epoxy is formed on a heat sink and the epoxy layer is fully cured. A thermoplastic adhesive layer is formed on the epoxy layer, and the heat sink is clamped to the lead frame such that the thermoplastic layer contacts the lead frame. The thermoplastic layer is heated to its melting point and then cooled, thereby joining the heat sink and the lead frame. In a variation, a partially cured B-stage epoxy layer is used to replace the thermoplastic layer. The B-stage epoxy layer is fully cured to connect the lead frame to the heat sink.
  • Lead Frame With Electrostatic Discharge Protection

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  • US Patent:
    57738769, Jun 30, 1998
  • Filed:
    Nov 6, 1996
  • Appl. No.:
    8/744681
  • Inventors:
    Boonmi Mekdhanasarn - Sunnyvale CA
    Randy Hsiao-Yu Lo - Campbell CA
  • Assignee:
    National Semiconductor Corporation - Santa Clara CA
  • International Classification:
    H01L 2348
  • US Classification:
    257665
  • Abstract:
    A lead frame having protection against electrostatic discharge is disclosed. The lead frame having protection against electrostatic discharge includes a multiplicity of leads and an electrostatic discharge protection device. The electrostatic discharge protection device includes a conductive layer and a protection layer. The protection layer is arranged to contact a plurality of leads and is formed from an electrostatic discharge protection material, which insulates the leads from the conductive layer at voltages below a predefined threshold voltage and establishes an electrical connection between the leads and the conductive layer at voltages above the threshold voltage.
  • Electrostatic Discharge Protection Package

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  • US Patent:
    57965706, Aug 18, 1998
  • Filed:
    Sep 19, 1996
  • Appl. No.:
    8/724305
  • Inventors:
    Boonmi Mekdhanasarn - Sunnyvale CA
    Randy Hsiao-Yu Lo - Campbell CA
    Steve M. Ichikawa - Fremont CA
    Abdul Rahim Ahmed - Morgan Hill CA
  • Assignee:
    National Semiconductor Corporation - Santa Clara CA
  • International Classification:
    H02H 100
  • US Classification:
    361126
  • Abstract:
    Described is a circuit board having protection against electrostatic discharge. The board includes a plurality of interconnect traces and an electrically conductive ground plane formed on a substrate such that a gap is created between the interconnect traces and the ground plane. A resistive electrostatic discharge protection material is positioned to bridge the gaps between the ground plane and the interconnect traces, such that the electrostatic discharge protection material electrically insulates the interconnect traces from the ground plane at voltages below a predefined threshold voltage and establishes an electrical connection between the interconnect traces and the conductive plane at voltages above the threshold voltage. A process of manufacturing the circuit board includes forming interconnect traces and a ground plane such that there is a gap between the ground plane and the interconnect traces. A resistive electrostatic discharge protection material is placed in the gap between the ground plane and the traces for protection against electrostatic discharge.
  • Lead Frame With Electrostatic Discharge Protection

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  • US Patent:
    58917608, Apr 6, 1999
  • Filed:
    Mar 25, 1998
  • Appl. No.:
    /047884
  • Inventors:
    Boonmi Mekdhanasarn - Sunnyvale CA
    Randy Hsiao-Yu Lo - Campbell CA
  • Assignee:
    National Semiconductor Corporation - Santa Clara CA
  • International Classification:
    H01L 2144
    H01L 2148
    H01L 2150
  • US Classification:
    438123
  • Abstract:
    A lead frame having protection against electrostatic discharge is disclosed. The lead frame having protection against electrostatic discharge includes a multiplicity of leads and an electrostatic discharge protection device. The electrostatic discharge protection device includes a conductive layer and a protection layer. The protection layer is arranged to contact a plurality of leads and is formed from an electrostatic discharge protection material, which insulates the leads from the conductive layer at voltages below a predefined threshold voltage and establishes an electrical connection between the leads and the conductive layer at voltages above the threshold voltage.

Resumes

Boonmi Mekdhanasarn Photo 1

Senior Packaging Engineer

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Location:
San Francisco, CA
Industry:
Semiconductors
Work:
National Semiconductor
Senior Packaging Engineer

Rgk Technical Sales
Manufacturers and #39; Representative

Mylife

Boonmi Mekdhanasarn Photo 2

Thitiporn Mekdhanasarn S...

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