Babak Y Ehteshami

US Patent:

7853916, Dec 14, 2010

Filed:

Oct 11, 2007

Appl. No.:

11/974355

Inventors:

Stephen M. Trimberger - San Jose CA, US
Babak Ehteshami - Redwood City CA, US

Assignee:

Xilinx, Inc. - San Jose CA

International Classification:

G06F 17/50
H03K 19/00
H03K 17/693

US Classification:

716 16, 716 1, 716 4, 716 5, 716 6, 716 9, 716 10, 716 17, 716 18

Abstract:

Methods of using one of a plurality of configuration bitstreams in an integrated circuit are disclosed. An exemplary method comprises analyzing the plurality of implementations of a design to determine initial variations in timing among the implementations; modifying the implementations to reduce the variations in timing among the implementations; and outputting a plurality of configuration bitstreams for the implementations having variations in timing that are reduced relative to the initial variations in timing. Another method comprises generating a plurality of implementations for the design; generating a cost function for the design based upon costs (e. g. , collision penalties) derived from at least two of the plurality of implementations; determining a cost for each implementation based upon the cost function; optimizing an implementation of the design by minimizing the cost of the implementation; generating a plurality of configuration bitstreams for the plurality of implementations; and outputting the plurality of configuration bitstreams.