Andrew J Tomlin

US Patent:

7315917, Jan 1, 2008

Filed:

Dec 19, 2005

Appl. No.:

11/312985

Inventors:

Alan David Bennett - Edinburgh, GB
Sergey Anatolievich Gorobets - Edinburgh, GB
Andrew Tomlin - San Jose CA, US
Charles Schroter - Los Gatos CA, US

Assignee:

SanDisk Corporation - Milpitas CA

International Classification:

G06F 12/00
G06F 13/00

US Classification:

711103, 711100, 711154

Abstract:

A re-programmable non-volatile memory system, such as a flash EEPROM system, having its memory cells grouped into blocks of cells that are simultaneously erasable is operated to perform memory system housekeeping operations in the foreground during execution of a host command, wherein the housekeeping operations are unrelated to execution of the host command. Both one or more such housekeeping operations and execution of the host command are performed within a time budget established for executing that particular command. One such command is to write data being received to the memory. One such housekeeping operation is to level out the wear of the individual blocks that accumulates through repetitive erasing and re-programming.

US Patent:

7427027, Sep 23, 2008

Filed:

Jul 28, 2004

Appl. No.:

10/901849

Inventors:

Reuven Elhamias - Kfar-Vradim, IL
Andrew Tomlin - San Jose CA, US
Wesley G. Brewer - Menlo Park CA, US
Yosi Pinto - Palo Alto CA, US
Micky Holtzman - Kfar-Vradim, IL

Assignee:

SanDisk Corporation - Milpitas CA

International Classification:

G06K 7/08

US Classification:

235451, 235492, 235380

Abstract:

A memory card that adapts its operation according to the application to which it applied or the conditions under which it is operated. This allows the card to dynamical self optimize. In a first set of embodiments, the card uses host profiling where it will learn about the host during host-card interactions and the card's controller will optimize its algorithms accordingly. In another set of embodiments, the host and card will report to one another their capabilities for a quality of service negotiation. A further set of embodiments allows the storage device to memorize access sequences issued by the host under various predefined conditions, such as host reset or a power on boot sequence. The storage device can use this information to optimize operation for the expected commands. On deviation from an expected sequence, the device would memorize the new command sequence and save it, thus operating in a self-adaptive manner.

US Patent:

7502921, Mar 10, 2009

Filed:

Aug 2, 2005

Appl. No.:

11/196161

Inventors:

Andrew Tomlin - San Jose CA, US
Carlos Gonzalez - Los Gatos CA, US

Assignee:

SanDisk Corporation - Milpitas CA

International Classification:

G06F 1/24

US Classification:

713100, 713320

Abstract:

The present invention presents a non-volatile memory system that adapts its performance to one or more system related situation. If a situation occurs where the memory will require more than the allotted time for completing an operation, the memory can switch from its normal operating mode to a high performance mode in order to complete the operation quickly enough. Conversely, if a situation arises where reliability could be an issue (such as partial page programming), the controller could switch to a high reliability mode. In either case, once the trigging system situation has returned to normal, the memory reverts to the normal operation. The detection of such situations can be used both for programming and data relocation operations. An exemplary embodiment is based on firmware programmable performance.

US Patent:

7565478, Jul 21, 2009

Filed:

Dec 3, 2007

Appl. No.:

11/949618

Inventors:

Alan David Bennett - Edinburgh, GB
Sergey Anatolievich Gorobets - Edinburgh, GB
Andrew Tomlin - San Jose CA, US
Charles Schroter - Los Gatos CA, US

Assignee:

Sandisk Corporation - Milpitas CA

International Classification:

G06F 12/02
G06F 13/00

US Classification:

711103, 711100, 711154, 36518533

Abstract:

A re-programmable non-volatile memory system, such as a flash EEPROM system, having its memory cells grouped into blocks of cells that are simultaneously erasable is operated to perform memory system housekeeping operations in the foreground during execution of a host command, wherein the housekeeping operations are unrelated to execution of the host command. Both one or more such housekeeping operations and execution of the host command are performed within a time budget established for executing that particular command. One such command is to write data being received to the memory. One such housekeeping operation is to level out the wear of the individual blocks that accumulates through repetitive erasing and re-programming.

US Patent:

7594135, Sep 22, 2009

Filed:

Dec 31, 2003

Appl. No.:

10/751033

Inventors:

Carlos J. Gonzalez - Los Gatos CA, US
Andrew Tomlin - San Jose CA, US

Assignee:

Sandisk Corporation - Milpitas CA

International Classification:

G06F 11/00

US Classification:

714 5, 714 6

Abstract:

Multiple copies of firmware code for controlling operation of a non-volatile flash memory system are stored at different suitable locations of the flash memory of a memory system. A map of addresses of these locations is also stored in the flash memory. Upon initialization of the memory system, boot code stored in the memory controller is executed by its microprocessor to reference the address map and load one copy of the firmware from the flash memory into a controller memory, from which it may then be executed by the microprocessor to operate the memory system to store and retrieve user data. An error correction code (ECC) is used to check the data but the best portions of the two or more firmware copies stored in the flash memory are used to reduce the need to use ECC. The firmware code may be stored in the flash memory in two-states when user data is stored in the same memory in more than two-states.

US Patent:

7681008, Mar 16, 2010

Filed:

Sep 29, 2006

Appl. No.:

11/537216

Inventors:

Andrew Tomlin - San Jose CA, US
Sergey Anatolievich Gorobets - Edinburgh, GB

Assignee:

SanDisk Corporation - Milpitas CA

International Classification:

G06F 13/00

US Classification:

711170, 711171, 711172, 707202

Abstract:

In a nonvolatile memory system, a host allocates clusters and records allocation information in a File Allocation Table that is stored in the nonvolatile memory. A controller separately allocates certain data and records allocation in a record in a volatile memory. File Allocation Table information provided to the host is modified according to the record in the volatile memory.

US Patent:

7752412, Jul 6, 2010

Filed:

Sep 29, 2006

Appl. No.:

11/537243

Inventors:

Andrew Tomlin - San Jose CA, US
Sergey Anatolievich Gorobets - Edinburgh, GB

Assignee:

Sandisk Corporation - Milpitas CA

International Classification:

G06F 13/00

US Classification:

711170, 711171, 711172

Abstract:

In a nonvolatile memory system, a host allocates clusters and records allocation information in a File Allocation Table that is stored in the nonvolatile memory. A controller separately allocates certain data and records allocation in a record in a volatile memory. File Allocation Table information provided to the host is modified according to the record in the volatile memory.

US Patent:

7849381, Dec 7, 2010

Filed:

Dec 21, 2004

Appl. No.:

11/022350

Inventors:

Andrew Tomlin - San Jose CA, US

Assignee:

SanDisk Corporation - Milpitas CA

International Classification:

G11C 29/00

US Classification:

714763

Abstract:

Methods are presented for improving data relocation operations. Rather than check data quality based on its associated error correction code (ECC) in every relocation operation, it can determine whether to check ECC based on predetermined selection criteria: if ECC checking is not selected, the memory can perform an on-chip copy of the data from a first location to a second location. If ECC checking is selected, the data is transferred to the controller and checked; when an error is found, a correction operation is performed and when no error is found, an on-chip copy is performed. Predetermined selection criteria may comprise a sampling mechanism, which may be random based or deterministic. Additionally, data transfer flags can be introduced to indicate data has been corrected and should be transferred back to the memory. Header and user data can be considered separately if each has a distinct associated ECC.