Md Akramul Hasan

US Patent:

20220262116, Aug 18, 2022

Filed:

Feb 11, 2022

Appl. No.:

17/670153

Inventors:

- Philadelphia PA, US
Md Mahmudul Hasan - Arlington VA, US

International Classification:

G06V 20/40
G06V 10/56
G06T 7/00
G06V 10/764

Abstract:

Described herein are methods, systems, and apparatuses for improved video frame analysis and classification. A computer vision model may be trained to predict whether a video frame(s) depicts a particular object(s), event(s), or imagery using color features of the video frame(s). Another computer vision model may focus on grayscale features of the video frame(s) (e.g., black and white features) to verify the prediction when the grayscale features of the video frame(s) indicate the particular object(s), event(s), or imagery is depicted in the video frame(s).

US Patent:

20210326688, Oct 21, 2021

Filed:

Jun 29, 2021

Appl. No.:

17/362272

Inventors:

- Dayton OH, US
Md Raqibul Hasan - Baltimore MD, US
Tarek M. Taha - Centerville OH, US

International Classification:

G06N 3/063
G11C 11/54
G11C 13/00

Abstract:

An analog neuromorphic circuit is disclosed, having input voltages applied to a plurality of inputs of the analog neuromorphic circuit. The circuit also includes a plurality of resistive memories that provide a resistance to each input voltage applied to each of the inputs so that each input voltage is multiplied in parallel by the corresponding resistance of each corresponding resistive memory to generate a corresponding current for each input voltage and each corresponding current is added in parallel. The circuit also includes at least one output signal that is generated from each of the input voltages multiplied in parallel with each of the corresponding currents for each of the input voltages added in parallel. The multiplying of each input voltage with each corresponding resistance is executed simultaneously with adding each corresponding current for each input voltage.

US Patent:

20200364550, Nov 19, 2020

Filed:

Jun 1, 2020

Appl. No.:

16/889177

Inventors:

- Dayton OH, US
Md Raqibul Hasan - Baltimore MD, US
Tarek M. Taha - Centerville OH, US

International Classification:

G06N 3/063
G11C 11/54
G11C 13/00

Abstract:

An analog neuromorphic circuit is disclosed, having input voltages applied to a plurality of inputs of the analog neuromorphic circuit. The circuit also includes a plurality of resistive memories that provide a resistance to each input voltage applied to each of the inputs so that each input voltage is multiplied in parallel by the corresponding resistance of each corresponding resistive memory to generate a corresponding current for each input voltage and each corresponding current is added in parallel. The circuit also includes at least one output signal that is generated from each of the input voltages multiplied in parallel with each of the corresponding currents for each of the input voltages added in parallel. The multiplying of each input voltage with each corresponding resistance is executed simultaneously with adding each corresponding current for each input voltage.

US Patent:

20200074291, Mar 5, 2020

Filed:

Nov 11, 2019

Appl. No.:

16/679800

Inventors:

- Dayton OH, US
Md Raqibul Hasan - Baltimore MD, US
Tarek M. Taha - Centerville OH, US

International Classification:

G06N 3/063
G11C 13/00
G11C 11/54

Abstract:

An analog neuromorphic circuit is disclosed, having input voltages applied to a plurality of inputs of the analog neuromorphic circuit. The circuit also includes a plurality of resistive memories that provide a resistance to each input voltage applied to each of the inputs so that each input voltage is multiplied in parallel by the corresponding resistance of each corresponding resistive memory to generate a corresponding current for each input voltage and each corresponding current is added in parallel. The circuit also includes at least one output signal that is generated from each of the input voltages multiplied in parallel with each of the corresponding currents for each of the input voltages added in parallel. The multiplying of each input voltage with each corresponding resistance is executed simultaneously with adding each corresponding current for each input voltage.