- San Jose CA, US Jun YANG - Cupertino CA, US Ajit Vijay BARVE - San Jose CA, US Matthew Glenn PETERS - Menlo Park CA, US
International Classification:
H01S 5/183 H01S 5/343 H01S 5/34
Abstract:
A method of forming a vertical cavity surface emitting laser (VCSEL) device using a multiphase growth sequence includes forming a first mirror over a substrate; forming an active region (e.g., a dilute nitride active region) over the first mirror; forming an oxidation aperture (OA) layer over the active region; forming a spacer on a surface of the OA layer; and forming a second mirror over the spacer. The active region is formed using a molecular beam epitaxy (MBE) process during an MBE phase of the multiphase growth sequence and the second mirror is formed using a metal-organic chemical vapor deposition (MOCVD) process during an MOCVD phase of the multiphase growth sequence.
Methods For Forming A Vertical Cavity Surface Emitting Laser Device
- San Jose CA, US Ajit Vijay BARVE - San Jose CA, US Jun YANG - Cupertino CA, US Guowei ZHAO - Milpitas CA, US Matthew Glenn PETERS - Menlo Park CA, US
International Classification:
H01S 5/343 H01S 5/34 H01S 5/183
Abstract:
A method of forming a VCSEL device cavity using a multiphase growth sequence includes forming a first mirror over a substrate, forming a tunnel junction over the first mirror, forming an oxidation aperture (OA) layer over the tunnel junction, forming a p-doped layer over the OA layer, forming an active region over the p-doped layer, forming a second mirror over the active region, and forming a contact layer over the second mirror. The first mirror, the tunnel junction, the OA layer, and the p-doped layer are formed using a metal-organic chemical vapor deposition (MOCVD) process during an MOCVD phase of the multiphase growth sequence. The active region, the second mirror, and the contact layer are formed using a molecular beam epitaxy (MBE) process during an MBE phase of the multiphase growth sequence.
Vertical-Cavity Surface-Emitting Laser With A Tunnel Junction
- San Jose CA, US Guowei ZHAO - Milpitas CA, US Matthew Glenn PETERS - Menlo Park CA, US Eric R. HEGBLOM - Sunnyvale CA, US Ajit Vijay BARVE - San Jose CA, US Benjamin KESLER - Sunnyvale CA, US
International Classification:
H01S 5/34 H01S 5/183 H01S 5/042
Abstract:
A VCSEL may include an n-type substrate layer and an n-type bottom mirror on a surface of the n-type substrate layer. The VCSEL may include an active region on the n-type bottom mirror and a p-type layer on the active region. The VCSEL may include an oxidation layer over the active region to provide optical and electrical confinement of the VCSEL. The VCSEL may include a tunnel junction over the p-type layer to reverse a carrier type of an n-type top mirror. Either the oxidation layer is on or in the p-type layer and the tunnel junction is on the oxidation layer, or the tunnel junction is on the p-type layer and the oxidation layer is on the tunnel junction. The VCSEL may include the n-type top mirror over the tunnel junction, a top contact layer over the n-type top mirror, and a top metal on the top contact layer.
Emitter Array With Shared Via To An Ohmic Metal Shared Between Adjacent Emitters
- Milpitas CA, US Ajit Vijay BARVE - San Jose CA, US
International Classification:
H01S 5/42 H01S 5/042 H01S 5/028
Abstract:
An emitter array may comprise a plurality of emitters that includes two adjacent emitters. The emitter array may comprise a plurality of emitters that includes two adjacent emitters. The ohmic metal layer may include a portion that is shared by, and located between, the two adjacent emitters. The emitter array may comprise a protective layer over the ohmic metal layer. The emitter array may comprise a via through the protective layer to the portion. The via is shared by, and located between, the two adjacent emitters.
- Milpitas CA, US Ajit Vijay Barve - San Jose CA, US Guowei Zhao - Milpitas CA, US
International Classification:
H01S 5/42
Abstract:
A wafer may comprise a substrate layer and a plurality of vertical cavity surface emitting lasers (VCSELs) formed on or within the substrate layer. A respective trench-to-trench distance associated with the plurality of VCSELs may vary across the wafer based on a predicted variation of an oxidation rate of an oxidation layer across the wafer.
Emitter Array With Variable Spacing Between Adjacent Emitters
- Milpitas CA, US Ajit Vijay BARVE - San Jose CA, US
International Classification:
H01S 5/42 H01S 5/024 H01S 5/026
Abstract:
In some implementations, a VCSEL array may include a plurality of VCSELs that each operates concurrently and emits light at a same wavelength. A first distance between a first pair of adjacent VCSELs, of the plurality of VCSELs, may be different from a second distance between a second pair of adjacent VCSELs of the plurality of VCSELs. The first pair of adjacent VCSELs may be located closer to a center of the VCSEL array than the second pair of adjacent VCSELs. At least one of temperature non-uniformity or optical power non-uniformity among the plurality of VCSELs may be reduced as compared to another VCSEL array, with a same physical footprint as the VCSEL array, comprising uniformly spaced VCSELs.
Emitter Array With Shared Via To An Ohmic Metal Shared Between Adjacent Emitters
- Milpitas CA, US Ajit Vijay BARVE - San Jose CA, US
International Classification:
H01S 5/42 H01S 5/042 H01S 5/028
Abstract:
An emitter array may comprise a plurality of emitters that includes two adjacent emitters. The emitter array may comprise a plurality of emitters that includes two adjacent emitters. The ohmic metal layer may include a portion that is shared by, and located between, the two adjacent emitters. The emitter array may comprise a protective layer over the ohmic metal layer. The emitter array may comprise a via through the protective layer to the portion. The via is shared by, and located between, the two adjacent emitters.
Configuring An Emitter Pattern For An Emitter Array To Avoid A Potential Dislocation Line
- Milpitas CA, US David Venables - Milpitas CA, US Eric R. Hegblom - Sunnyvale CA, US Ajit Vijay Barve - San Jose CA, US
International Classification:
H01S 5/42 H01S 5/183
Abstract:
A die may comprise a plurality of adjacent emitters and a potential dislocation line. The plurality of adjacent emitters and the potential dislocation line may be offset from each other within a range of angles based on a relative rotation of the plurality of adjacent emitters and the potential dislocation line.