Adrian Hernandez

US Patent:

8041553, Oct 18, 2011

Filed:

Feb 29, 2008

Appl. No.:

12/040299

Inventors:

Adrian M. Hernandez - Longmont CO, US
Michael E. Darnall - San Jose CA, US

Assignee:

Xilinx, Inc. - San Jose CA

International Classification:

G06F 17/50

US Classification:

703 14, 714 30, 714733, 714734, 716106, 716136, 719324

Abstract:

A computer-based system for testing a circuit design for implementation within an integrated circuit device can include a design application () providing simulation instructions for testing a circuit design and a simulation driver () receiving the simulation instructions and translating the simulation instructions into control protocol instructions specifying operations of an integrated circuit control protocol. The system can include a simulation environment (). The simulation environment can include a communication module () communicating with the simulation driver, a simulation cable driver () receiving the control protocol instructions from the simulation driver via the communication module, and a control module (). The simulation cable driver further can translate the control protocol instructions into signaling information corresponding to the integrated circuit control protocol. The control module can include a plurality of ports receiving the signaling information and outputting the signaling information to a device under test within the simulation environment.

US Patent:

20210081215, Mar 18, 2021

Filed:

Sep 18, 2019

Appl. No.:

16/574956

Inventors:

- San Jose CA, US
Adrian M. Hernandez - Longmont CO, US
David Robinson - Loanhead, GB
Elessar Taggart - Longmont CO, US
Max Heimer - Boulder CO, US

Assignee:

Xilinx, Inc. - San Jose CA

International Classification:

G06F 9/445
G06F 11/07

Abstract:

Tracing status of a programmable device can include, in response to loading a device image for the programmable device, determining, using a processing unit on the programmable device, trace data for the device image, storing, by the processing unit, the trace data for the device image in a memory, and, in response to unloading the device image, recording the unloading of the device image in the trace data in the memory.

US Patent:

20160026742, Jan 28, 2016

Filed:

Jul 22, 2014

Appl. No.:

14/338155

Inventors:

- San Jose CA, US
Paul R. Schumacher - Berthoud CO, US
Adrian M. Hernandez - Longmont CO, US

Assignee:

XILINX, INC. - San Jose CA

International Classification:

G06F 17/50
H03K 19/177
G11C 7/10

Abstract:

An integrated circuit (IC) includes a bridge circuit configured to receive a first request from an external system, a discover circuit coupled to the bridge circuit and configured to process the first request received from the bridge circuit, and a memory map coupled to the discover circuit. The memory map stores a record for each of a plurality of Intellectual Property (IP) blocks implemented within the IC. The discover circuit is configured to generate a list of the IP blocks implemented within the IC from the records of the memory map responsive to the first request. The bridge circuit is configured to send the list to the external system.